With the progress of very-large-scale integration (VLSI) technology, the feature size of the semiconductor structure is continuously shrinking, the chip area is persistently getting bigger, and RC (R means resistance while C refers to the capacitance) delay problem of semiconductor structure becomes more and more significant. In particular, the growing influence of the line capacitance between the metal wiring results in a significant decline in device performance and it has become a key constraint to further development of the semiconductor industry.
Parasitic capacitance and interconnect resistance between metal interconnects of semiconductor structures cause transmission delay of the signal. Because copper has a relatively low resistivity, excellent anti-electromigration characteristics, and high reliability, it can be used to reduce interconnect resistance of metals, thus further reduce the total interconnect delay effect. Therefore, in semiconductor structures, the conventional aluminum interconnect has been changed to low-resistance copper interconnect.
However, with the development of semiconductor technology towards miniaturization and microminiaturization, it is urgent to provide a new semiconductor structure and a corresponding fabricating method to meet with the development trend of miniaturization of semiconductor technology.